The increasing deployment of interconnected electronic systems in applications such as IoT, automotive, wireless communications, and edge computing has made security a fundamental design requirement. In this context, traditional software-based protection mechanisms are no longer sufficient to counter increasingly sophisticated threats, including physical tampering, side-channel analysis, and fault injection attacks. As a result, hardware security has emerged as a critical enabler of trustworthy systems. 

Moreover, hardware constitutes the root of trust upon which higher-level security protocols rely. Any vulnerability at this level can compromise the entire system, highlighting the need for robust, efficient, and attack-resilient design methodologies. At the same time, designers must address challenging trade-offs between security, performance, power consumption, and implementation cost. 

In this rapidly evolving landscape, there is a clear need for a dedicated forum to discuss recent advances, emerging challenges, and practical solutions in hardware security. This special session aims to bring together researchers and practitioners to share insights and foster innovation in the design of secure, high-performance electronic circuits and systems. 

Topics of interest for this special session include, but are not limited to: 

1. Hardware Security Primitives (Entropy generation: TRNGs, PUFs). 
2. Vulnerabilities in AMS Circuits (Parametric Trojans, Reverse Engineering, Side-Channel Leaks). 
3. Efficient hardware implementations of multi-layer cryptographic systems. 
4. Supply Chain & Chiplet Security. 
5. FPGA and ASIC implementations of cryptographic solutions. 
6. Quantum and post-Quantum cryptography. 
7. Emerging topics in the field of hardware security (artificial intelligence, quantum computing.) 
8. Quantum Communication Infrastructures 

By bringing together leading experts in hardware security across circuits, systems, and technologies, this special session will offer a forum to explore cutting-edge research and emerging challenges in secure hardware design. A particular focus will be placed on hardware-based security mechanisms that underpin modern communication systems, ensuring robust data confidentiality, integrity, and authentication in increasingly connected environments. By bridging experts in the field, the session will highlight practical pathways toward high-performance and trustworthy security solutions. 

 

Given the growing importance of secure communications and trusted electronic systems, we strongly believe that this topic is highly relevant to the DCIS community. The proposed session not only aligns seamlessly with the conference themes but also brings a forward-looking perspective that is expected to attract significant interest from both academic researchers and industry practitioners. 

• Short biography of the organizers 

João Casaleiro (Member, IEEE) He is currently an Adjunct Professor at the Department of Electronics, Telecommunications and Computer Engineering at Instituto Superior de Engenharia de Lisboa (ISEL). He is also a researcher at the Centre of Technology and Systems (CTS-UNINOVA), working in the field of microelectronics. His research interests include the design of integrated circuits and RF front-ends, as well as True Random Number Generators (TRNGs) and Physically Unclonable Functions (PUFs) based on oscillator noise, with applications in hardware security, authentication, and identification systems. He has participated several National and European projects in science, technology, networking. 

Luis Oliveira (Senior Member, IEEE) has been with the DEEC at FCT NOVA, where he is an Associate Professor. He is currently an elected member of the board of the Department of Electrical and Computer Engineering (DEEC), and elected coordinator of the Electronics section. He received the award of best teaching professor (voted by the 1000 students at DEEC), in the year 2022-2023. He has more than 130 publications in International Journals and Conferences and is co-author of three books. He was Associate Editor of the IEEE Transactions on Circuits and Systems – II, TCAS-II, 2018-2023. He is currently a researcher at CTS – UNINOVA, where he is member of the executive board since 2018, leading nearly 50 Senior Researchers with a PhD, over 70 collaborators and more than 90 PhD students. His current research interests are on RF oscillators, PLLs, LNAs, Mixers, and other building blocks for RF integrated transceivers, Since 2002 he has participated and led several National and European projects in science, technology, networking, and training.Recently, he was the PI of projects ROBUST (EXPL/EEIEEE/0776/2021) focused in develop secure IoT Systems, and foRESTER:PCIF/SSI/0102/2017 (www.forester.pt) dedicated to provide new eficiente tools capable of improving decision making during wildfires crisis to minimize its negative consequences. He is the PI of two ongoing projects: SECURE (LISBOA2030-FEDER-00816400), Physically Unclonable Circuits for Secure Digital Systems Using Hybrid Technologies: Printed Electronics and CMOS, and FRONT (2024.16986.PEX), Fully Integrated Multiphase Clock Generator and RF Front End for Frequency Interleaved-ADCs in SerDes 224G Applications.